中圖分類號(hào)： TN402
文獻(xiàn)標(biāo)識(shí)碼： A
DOI：10.16157/j.issn.0258-7998.219806
中文引用格式： 何永松，秦祖立，林麟，等. 基于信號(hào)與電源完整性的有效分析優(yōu)化2.5D-3D的設(shè)計(jì)[J].電子技術(shù)應(yīng)用，2021，47(8)：64-67，71.
英文引用格式： He Yongsong，Qin Zuli，Lin Lin，et al. Optimizing 2.5D/3D IC design with efficient power and signal integrity analysis[J]. Application of Electronic Technique，2021，47(8)：64-67，71.

Optimizing 2.5D/3D IC design with efficient power and signal integrity analysis

Abstract： Compared with the traditional DRAM interface, the HBM(High Bandwidth Memory) storage system has the characteristics of high speed and low power consumption. In the design of 2.5D/3D, as the rate of HBM increases, the design considerations of signal and power integrity are becoming more and more important. How to guide the design of products through effective simulation is a challenge. The article firstly discusses design considerations from the perspective of signal integrity, then discusses the impact of power supply noise on high-speed transmission signals from the perspective of power integrity and proposes how to simulate and predict the effects of Simultaneous Switch noises. Finally based on the silicon chip, simulations have well correlated and verified by test results.

Key words : 2.5D/3D design；signal integrity；power integrity；SSN；voltage noise prediction